1. Field of the Invention
The present invention relates generally to data clocking in an integrated circuit (IC).
2. Background Art
The current consumed by an integrated circuit (IC) can vary dramatically, based on activity level. The supply voltage at the IC, in turn, can vary, depending on this current consumption. Different static loads can also affect the DC level of the supply voltage. Dynamic changes to the load can cause dynamic voltage transients.
Typically, the maximum clock frequency of the IC is limited by the worst-case voltage it may receive. Although most of the time the voltage provided to the IC can support a higher clock frequency, the clock frequency is still constrained to accommodate the worst-case voltage transients.
Accordingly, there is a need for adaptive clock schemes that accommodate voltage transients.
The present invention will be described with reference to the accompanying drawings. Generally, the drawing in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.